| No. | Symbol | Function |
|---|
| 1 |
NC |
No connection |
| 2 |
VPP |
This is the most positive voltage supply pad of the chip.
It should be supplied externally. |
| 3 |
VSEGM |
This is a pad for the voltage output level for segment pre-charge.
A capacitor should be connected between this pad and VSS. |
| 4 |
VCOMH |
This is a pad for the voltage output high level for common signals.
A capacitor should be connected between this pad and VSS. |
| 5 |
VSL |
This is a segment voltage reference pad.
A capacitor should be connected between this pad and VSS. |
| 6 |
NC |
No connection |
| 7 |
IREF |
This is a segment current reference pad.
A resistor should be connected between this pad and VSS. Set the current at 15.625uA. |
| 8 |
VPP |
This is the most positive voltage supply pad of the chip.
It should be supplied externally. |
| 9 |
NC |
No connection |
| 10 |
VSS |
Ground for analog, logic & buffer respectively. |
| 11 |
VCL |
This is a common voltage reference pad.
This pad should be connected to VSS externally. |
| 12 |
VDD |
1.65 - 3.5V power supply input pad for logic. |
| 13 |
IM0 |
These are the MPU interface mode select pads.
| | 8080 | I2C | 6800 | 4-Wire SPI | 3-Wire SPI |
|---|
| IM0 |
0 |
0 |
0 |
0 |
1 |
| IM1 |
1 |
1 |
0 |
0 |
0 |
| IM2 |
1 |
0 |
1 |
0 |
0 |
|
| 14 |
IM1 |
| 16 |
IM2 |
| 15 |
VDD |
1.65 - 3.5Vpower supply input pad |
| 17 |
CS |
This pad is the chip select input. When CS = “L”, then the chip select becomes active, and data command I/O is enabled. |
| 18 |
RES |
This is a reset signal input pad. When RES is set to “L”, the settings are initialized. The reset operation is performed by the RES signal level. |
| 19 |
A0 |
This is the Data/Command control pad that determines whether the data bits are data or a command.
A0 = “H”: the inputs at D0 to D7 are treated as display data.
A0 = “L”: the inputs at D0 to D7 are transferred to the command registers.
In I2C interface, this pad serves as SA0 to distinguish the different address of OLED driver. |
| 20 |
WR |
This is a MPU interface input pad.
When connected to an 8080 MPU, this is active LOW. This pad connects to the 8080 MPU WR signal. The signals on the data bus are latched at the rising edge of the WR signal. When connected to a 6800 Series MPU: This is the read/write control signal input terminal. When WR = “H”: Read. When WR = “L”: Write. |
| 21 |
RD |
This is a MPU interface input pad.
When connected to an 8080 series MPU, it is active LOW. This pad is connected to the RD signal of the 8080 series MPU, and the data bus is in an output status when this signal is “L”. When connected to a 6800 series MPU, this is active HIGH. This is used as an enable clock input of the 6800 series MPU. |
| 22 |
D0 |
This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit standard MPU data bus.
When the serial interface is selected, then D0 serves as the serial clock input pad (SCL) and D1 serves as the serial data input pad (SI). At this time, D2 to D7 are set to high impedance.
When the I2C interface is selected, then D0 serves as the serial clock input pad (SCL) and D1 serves as the serial data input pad (SDA). At this time, D2 to D7 are set to high impedance. |
| 23 |
D1 |
| 24 |
D2 |
| 25 |
D3 |
| 26 |
D4 |
| 27 |
D5 |
| 28 |
D6 |
| 29 |
D7 |
| 30 |
NC |
No connection |
| 31 |
VPP |
This is the most positive voltage supply pad of the chip.
It should be supplied externally. |
